STM32F302xB STM32F302xC
Electrical characteristics
3. Channels available on PA2, PA6.
Table 70. ADC accuracy - limited test conditions, 100-pin packages (1)(2)
Symbol Parameter
Conditions
Min
(3)
Typ
Max
(3)
Unit
Total
ET unadjusted
error
EO Offset error
EG Gain error
Differential
ED linearity
error
Integral
EL linearity
error
Effective
ENOB(4) number of
bits
Signal-to-
SINAD(4)
noise and
distortion
ratio
ADC clock freq. ≤ 72 MHz
Sampling freq. ≤ 5 Msps
VDDA = VREF+ = 3.3 V
25°C
100-pin package
Fast channel 5.1 Ms
Single ended
Slow channel 4.8 Ms
- ±3.5 ±4.5
- ±4 ±4.5
Fast channel 5.1 Ms - ±3 ±3
Differential
Slow channel 4.8 Ms - ±3 ±3
Fast channel 5.1 Ms - ±1 ±1.5
Single ended
Slow channel 4.8 Ms - ±1 ±2.5
Fast channel 5.1 Ms - ±1 ±1.5
Differential
Slow channel 4.8 Ms - ±1 ±1.5
Fast channel 5.1 Ms
Single ended
Slow channel 4.8 Ms
Fast channel 5.1 Ms
Differential
Slow channel 4.8 Ms
- ±3 ±4
- ±3.5 ±4
LSB
- ±1.5 ±2.5
- ±2 ±2.5
Fast channel 5.1 Ms - ±1 ±1.5
Single ended
Slow channel 4.8 Ms - ±1 ±1.5
Fast channel 5.1 Ms - ±1 ±1
Differential
Slow channel 4.8 Ms - ±1 ±1
Fast channel 5.1 Ms
Single ended
Slow channel 4.8 Ms
- ±1.5 ±2
- ±1.5 ±3
Fast channel 5.1 Ms - ±1 ±1.5
Differential
Slow channel 4.8 Ms - ±1 ±1.5
Fast channel 5.1 Ms 10.7 10.8 -
Single ended
Slow channel 4.8 Ms 10.7 10.8 -
bits
Fast channel 5.1 Ms 11.2 11.3 -
Differential
Slow channel 4.8 Ms 11.1 11.3 -
Fast channel 5.1 Ms 66 67 -
Single ended
Slow channel 4.8 Ms 66 67 -
dB
Fast channel 5.1 Ms 69 70 -
Differential
Slow channel 4.8 Ms 69 70 -
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