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STM32F302CBT7TR View Datasheet(PDF) - STMicroelectronics

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STM32F302CBT7TR Datasheet PDF : 144 Pages
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Electrical characteristics
STM32F302xB STM32F302xC
6.3.19 DAC electrical specifications
Table 75. DAC characteristics
Symbol
Parameter
Conditions
Min
VDDA Analog supply voltage
RLOAD(1) Resistive load
RO(1)
CLOAD(1)
Output impedance
Capacitive load
VDAC_OUT
(1)
Voltage
output
on
DAC_OUT
-
2.4
DAC output Connected to VSSA 5
buffer ON Connected to VDDA 25
DAC output buffer OFF
-
DAC output buffer ON
-
Corresponds to 12-bit input
code (0x0E0) to (0xF1C) at
VDDA = 3.6 V
and (0x155) and (0xEAB) at
0.2
VDDA = 2.4 V DAC output buffer
ON.
DAC output buffer OFF
-
IDDA(3)
DAC DC current
consumption in quiescent
mode (Standby mode)(2)
With no load, middle code
(0x800) on the input.
With no load, worst code
(0xF1C) on the input.
-
-
Differential non linearity
Given for a 10-bit input code
-
DNL(3) Difference between two
consecutive code-1LSB) Given for a 12-bit input code
-
Integral non linearity
Given for a 10-bit input code
-
(difference between
INL(3)
measured value at Code i
and the value at Code i on a Given for a 12-bit input code
-
line drawn between Code 0
and last Code 4095)
-
-
Offset(3)
Offset error (difference
between measured value at
Code (0x800) and the ideal
Given for a 10-bit input code at
VDDA = 3.6 V
-
value = VDDA/2)
Given for a 12-bit input code at
VDDA = 3.6 V
-
Gain error(3) Gain error
Given for a 12-bit input code
-
Settling time (full scale: for a
12-bit input code transition
tSETTLING(3)
between the lowest and the
highest input codes when
CLOAD ≤50 pF,
RLOAD ≥ 5 kΩ
-
DAC_OUT reaches final
value ±1LSB
Max frequency for a correct
Update
rate(3)
DAC_OUT change when CLOAD ≤50 pF,
small variation in the input RLOAD ≥ 5 kΩ
-
code (from code i to i+1LSB)
Typ
Max
Unit
-
3.6
V
-
-
kΩ
-
-
-
15
kΩ
-
50
pF
-
VDDA – 0.2 V
0.5 VDDA - 1LSB mV
-
380
µA
-
480
µA
-
±0.5
LSB
-
±2
LSB
-
±1
LSB
-
±4
LSB
-
±10
mV
-
±3
LSB
-
±12
LSB
-
±0.5
%
3
4
µs
-
1
MS/s
116/144
DocID025186 Rev 7

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