STM32F302VCY7 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F302VCY7

ARM®-based Cortex®-M4 32b MCU+FPU, up to 256KB Flash+ 40KB SRAM, 2 ADCs, 1 DAC ch., 4 comp, 2 PGA, timers, 2.0-3.6 V

STMicroelectronics 

Revision history

STM32F302xB STM32F302xC

Table 88. Document revision history (continued)

Date

Revision

Changes

29-Jan-2015

17-Apr-2015

Updated cover page with ADC up to 17 channels.

Updated Section 6.3.20: Comparator characteristics modifying ts_sc

4

characteristics in Table 76 and adding Figure 37: Maximum VREFINT

scaler startup time from power down.

Updated IDD data in Table 42: HSE oscillator characteristics.

Updated Figure 1: STM32F302xB/STM32F302xC block diagram

changing 32 KB of SRAM by 40 KB of SRAM.

Updated Section 7: Package information: with new package information

structure adding 1 sub paragraph for each package.

Updated Figure 41: LQFP100 – 14 x 14 mm, low-profile quad flat

package top view example removing gate mark.

5

Added note for all package device markings: “the following figure gives

an example of topside marking orientation versus pin 1 identifier

location”.

Updated Table 82: LQFP64 – 10 x 10 mm, low-profile quad flat package

mechanical data.

Updated Table 7: STM32F302xB/STM32F302xC peripheral

interconnect matrix removing TIM8 reference and updating note below

the table, replacing by a reference to RM0365.

Added WLCSP100:

– Updated cover page.

– Updated Table 2: STM32F302xx family device features and peripheral

counts.

– Added Figure 7: STM32F302xB/STM32F302xC WLCSP100 pinout.

– Updated Table 13: STM32F302xB/STM32F302xC pin definitions.

– Updated Table 24: General operating conditions.

– Added Section 7.4: WLCSP100 - 0.4 mm pitch wafer level chip scale

package information.

– Updated Table 86: Package thermal characteristics.

– Updated Table 87: Ordering information scheme.

22-Feb-2016

6

Updated Figure 4, Figure 5, Figure 6, Table 13 and Table 22 removing

all VDD and VSS indexes.

Updated all the notes removing ‘not tested in production’.

Updated Table 68: ADC characteristics adding VREF- negative voltage

reference.

Updated Table 21: Voltage characteristics adding table note 4.

Updated Table 43: LSE oscillator characteristics (fLSE = 32.768 kHz)

LSEDRV[1:0] bits.

Updated Table 28: Embedded internal reference voltage VREFINT

internal reference voltage (min and typ values).

Updated Table 51: ESD absolute maximum ratings ESD CDM at class 3

and 4 including WLCSP100 package information.

142/144

DocID025186 Rev 7

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