STM32F302xB STM32F302xC
Electrical characteristics
Figure 24. Recommended NRST pin protection
([WHUQDO
UHVHWFLUFXLWU\
9''
538
1567
—)
)LOWHU
,QWHUQDOUHVHW
6.3.16
069
1. The reset network protects the device against parasitic resets.
2.
The user must ensure that the
Table 57. Otherwise the reset
wleilvl enlootnbethteakNeRnSinTtopiancccaonungtobbyetlhoewdtheevicVeIL. (NRST)
max
level
specified
in
Timer characteristics
The parameters given in Table 58 are guaranteed by design.
Refer to Section 6.3.14: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
Symbol
Table 58. TIMx(1)(2) characteristics
Parameter
Conditions
Min
tres(TIM) Timer resolution time
-
fTIMxCLK = 72 MHz
fTIM1CLK = 144 MHz
1
13.9
6.95
Max
-
-
-
Unit
tTIMxCLK
ns
ns
fEXT
ResTIM
Timer external clock
frequency on CH1 to CH4
Timer resolution
-
fTIMxCLK = 72 MHz
TIMx (except TIM2)
TIM2
-
tCOUNTER 16-bit counter clock period fTIMxCLK = 72 MHz
fTIM1CLK = 144 MHz
0
0
-
-
1
0.0139
0.0069
fTIMxCLK/2
36
16
32
65536
910
455
MHz
MHz
bit
tTIMxCLK
µs
µs
-
-
65536 × 65536 tTIMxCLK
tMAX_COUNT
Maximum possible count
with 32-bit counter
fTIMxCLK = 72 MHz
fTIM1CLK = 144 MHz
-
-
59.65
29.825
s
s
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3, TIM4, TIM15, TIM16 and TIM17 timers.
2. Guaranteed by design.
DocID025186 Rev 7
91/144
123