ST10F276R-6QR3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST10F276R-6QR3

16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM

STMicroelectronics 

Pin data

ST10F276E

Table 1. Pin description (continued)

Symbol

Pin Type

Function

XTAL1

138

I XTAL1 Main oscillator amplifier circuit and/or external clock input.

XTAL2

137

O XTAL2 Main oscillator amplifier circuit output.

To clock the device from an external source, drive XTAL1 while leaving XTAL2

unconnected. Minimum and maximum high / low and rise / fall times specified in

the AC Characteristics must be observed.

XTAL3

XTAL4

143

I XTAL3 32 kHz oscillator amplifier circuit input

144

O XTAL4 32 kHz oscillator amplifier circuit output

RSTIN

RSTOUT

NMI

When 32 kHz oscillator amplifier is not used, to avoid spurious consumption,

XTAL3 shall be tied to ground while XTAL4 shall be left open. Besides, bit OFF32

in RTCCON register shall be set. 32 kHz oscillator can only be driven by an

external crystal, and not by a different clock source.

Reset Input with CMOS Schmitt-Trigger characteristics. A low level at this pin for

a specified duration while the oscillator is running resets the ST10F276E. An

140

I

internal pull-up resistor permits power-on reset using only a capacitor connected

to VSS. In bidirectional reset mode (enabled by setting bit BDRSTEN in

SYSCON register), the RSTIN line is pulled low for the duration of the internal

reset sequence.

Internal Reset Indication Output. This pin is driven to a low level during

141

O hardware, software or watchdog timer reset. RSTOUT remains low until the EINIT

(end of initialization) instruction is executed.

Non-Maskable Interrupt Input. A high to low transition at this pin causes the CPU

to vector to the NMI trap routine. If bit PWDCFG = ‘0’ in SYSCON register, when

the PWRDN (power down) instruction is executed, the NMI pin must be low in

142

I order to force the ST10F276E to go into power down mode. If NMI is high and

PWDCFG = ‘0’, when PWRDN is executed, the part will continue to run in

normal mode.

If not used, pin NMI should be pulled high externally.

VAREF

VAGND

RPD

VDD

VSS

V18

37

- A/D converter reference voltage and analog supply

38

- A/D converter reference and analog ground

84

-

Timing pin for the return from interruptible power down mode and synchronous /

asynchronous reset selection.

17, 46,

72,82,93,

109, 126,

136

-

Digital supply voltage = + 5V during normal operation, idle and power down

modes.

It can be turned off when Stand-by RAM mode is selected.

18,45,

55,71,

83,94,

110, 127,

139

- Digital ground

56

-

1.8V decoupling pin: a decoupling capacitor (typical value of 10nF, max 100nF)

must be connected between this pin and nearest VSS pin.

22/235

Doc ID 12303 Rev 3

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