CSR8635 View Datasheet(PDF) - CSR plc

Part Name

Description

Manufacturer

CSR8635

The CSR8635 QFN single-chip Bluetooth® audio ROM device targets mid-range stereo speakers and headsets.

CSR plc 

Symbol Parameter

Min

Typ

Max

Unit

tmclkl (a)

PCM_CLK low

4MHz DDS generation

730

-

-

ns

-

PCM_CLK jitter

48MHz DDS generation

-

-

21

ns pk-pk

tdmclksynch

Delay time from PCM_CLK high to PCM_SYNC

high

-

-

20

ns

tdmclkpout

Delay time from PCM_CLK high to valid

PCM_OUT

-

-

20

ns

013 tdmclklsyncl

Delay time from PCM_CLK low to PCM_SYNC low

(Long Frame Sync only)

-

-

20

ber 27, 2 tdmclkhsyncl

Delay time from PCM_CLK high to PCM_SYNC

low

-

-

20

Septem tdmclklpoutz

Delay time from PCM_CLK low to PCM_OUT high

impedance

-

-

20

Friday, tdmclkhpoutz

Delay time from PCM_CLK high to PCM_OUT high

impedance

-

-

20

.cn - tsupinclkl

Set-up time for PCM_IN valid to PCM_CLK low

20

-

-

int.com thpinclkl

Hold time for PCM_CLK low to PCM_IN invalid

0

-

-

celpo Table 9.6: PCM Master Timing

ex (a) Assumes normal system clock operation. Figures vary during low-power modes, when system clock speeds are reduced.

keven.zhou - PCM_SYNC

t

dmclksynch

t

dmclklsyncl

t

dmclkhsyncl

Prepared for qingbo PCM_CLK

f

mlk

t

mclkh

t

mclkl

ns

ns

ns

ns

ns

ns

PCM_OUT

t

dmclkpout

MSB (LSB)

t ,t

rf

t

dmclklpoutz

t

dmclkhpoutz

LSB (MSB)

PCM_IN

t

supinclkl

t

hpinclkl

MSB (LSB)

LSB (MSB)

Figure 9.16: PCM Master Timing Long Frame Sync

Production Information

© Cambridge Silicon Radio Limited 2013

Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement

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