dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-5: IFS0: INTERRUPT FLAG STATUS REGISTER 0
U-0
—
bit 15
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
ADIF
U1TXIF
U1RXIF
SPI1IF
R/W-0
SPI1EIF
R/W-0
T3IF(1,2)
bit 8
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
T2IF(1,2)
OC2IF(1,2)
IC2IF
—
T1IF
OC1IF
IC1IF(1)
INT0IF
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
Unimplemented: Read as ‘0’
ADIF: ADC Group Conversion Complete Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
U1TXIF: UART1 Transmitter Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
U1RXIF: UART1 Receiver Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
SPI1IF: SPI1 Event Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
SPI1EIF: SPI1 Fault Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
T3IF: Timer3 Interrupt Flag Status bit(1,2)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
T2IF: Timer2 Interrupt Flag Status bit(1,2)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
OC2IF: Output Compare Channel 2 Interrupt Flag Status bit(1,2)
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
IC2IF: Input Capture Channel 2 Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
T1IF: Timer1 Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Note 1: This bit is not implemented in dsPIC33FJ06GS101/102 devices.
2: These bits are not implemented in dsPIC33FJ06GS202 devices.
DS70318D-page 104
Preliminary
© 2009 Microchip Technology Inc.