dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-24: IPC5: INTERRUPT PRIORITY CONTROL REGISTER 5
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
R/W-1
R/W-0
R/W-0
—
—
—
—
INT1IP<2:0>
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
bit 2-0
Unimplemented: Read as ‘0’
INT1IP<2:0>: External Interrupt 1 Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
REGISTER 7-25: IPC7: INTERRUPT PRIORITY CONTROL REGISTER 7
U-0
U-1
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
R/W-1
R/W-0
R/W-0
U-0
U-0
U-0
U-0
—
INT2IP<2:0>
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-7
bit 6-4
bit 3-0
Unimplemented: Read as ‘0’
INT2IP<2:0>: External Interrupt 2 Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 123