DSPIC33FJ06GS502-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ06GS502-I/ML Datasheet PDF : 346 Pages
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-29: IPC24: INTERRUPT PRIORITY CONTROL REGISTER 24
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
R/W-1
R/W-0
R/W-0
U-0
PWM4IP(1)
—
R/W-1
R/W-0
PWM3IP<2:0>(2)
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-7
bit 6-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
PWM4IP<2:0>: PWM4 Interrupt Priority bits(1)
111 = Interrupt is priority 7 (highest priority)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
PWM3IP<2:0>: PWM3 Interrupt Priority bits(2)
111 = Interrupt is priority 7 (highest priority)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Note 1: These bits are not implemented in dsPIC33FJ06GS202 and dsPIC33FJ16GS402/404 devices.
2: These bits are not implemented in dsPIC33FJ06101/102/202 devices.
DS70318D-page 126
Preliminary
© 2009 Microchip Technology Inc.
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