dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 9-6: PMD7: PERIPHERAL MODULE DISABLE CONTROL REGISTER 7
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
—
—
—
—
CMP4MD CMP3MD CMP2MD
bit 15
R/W-0
CMP1MD
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
bit 11
bit 10
bit 9
bit 8
bit 7-0
Unimplemented: Read as ‘0’
CMP4MD: Analog Comparator 4 Module Disable bit
1 = Analog Comparator 4 module is disabled
0 = Analog Comparator 4 module is enabled
CMP3MD: Analog Comparator 3 Module Disable bit
1 = Analog Comparator 3 module is disabled
0 = Analog Comparator 3 module is enabled
CMP2MD: Analog Comparator 2 Module Disable bit
1 = Analog Comparator 2 module is disabled
0 = Analog Comparator 2 module is enabled
CMP1MD: Analog Comparator 1 Module Disable bit
1 = Analog Comparator 1 module is disabled
0 = Analog Comparator 1 module is enabled
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 153