DSPIC33FJ06GS101-E/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ06GS101-E/SO Datasheet PDF : 346 Pages
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
10.5 Peripheral Pin Select Registers
The
dsPIC33FJ06GS101/X02
and
dsPIC33FJ16GSX02/X04 families of devices implement
34 registers for remappable peripheral configuration:
• 15 Input Remappable Peripheral Registers
• 19 Output Remappable Peripheral Registers
Note:
Input and output register values can only
be changed if OSCCON<IOLOCK> = 0.
See Section 10.4.3.1 “Control Register
Lock” for a specific command sequence.
Not all output remappable peripheral registers are
implemented on all devices. See the register
description of the specific register for further details.
REGISTER 10-1: RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
U-0
—
bit 15
U-0
R/W-1
R/W-1
R/W-1
R/W-1
—
INT1R<5:0>
R/W-1
R/W-1
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-0
Unimplemented: Read as ‘0’
INT1R<5:0>: Assign External Interrupt 1 (INTR1) to the Corresponding RPn Pin bits
111111 = Input tied to VSS
100011 = Input tied to RP35
100010 = Input tied to RP34
100001 = Input tied to RP33
100000 = Input tied to RP32
•
•
•
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 161
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