DSPIC33FJ16GS102-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ16GS102-I/SO Datasheet PDF : 346 Pages
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-4: SEVTCMP: PWM SPECIAL EVENT COMPARE REGISTER
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP <15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
SEVTCMP <7:3>
—
bit 7
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
bit 2-0
SEVTCMP<15:3>: Special Event Compare Count Value bits
Unimplemented: Read as ‘0’
REGISTER 15-5: MDC: PWM MASTER DUTY CYCLE REGISTER
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
MDC<15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
MDC<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
MDC<15:0>: Master PWM Duty Cycle Value bits
Note 1: The smallest pulse width that can be generated on the PWM output corresponds to a value of 0x0008,
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
2: As the duty cycle gets closer to 0% or 100% of the PWM period (0 ns-40 ns, depending on the mode of
operation), the PWM duty cycle resolution will degrade from 1 LSB to 3 LSB.
DS70318D-page 202
Preliminary
© 2009 Microchip Technology Inc.
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