dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-14: IOCONx: PWMx I/O CONTROL REGISTER
R/W-0
PENH
bit 15
R/W-0
PENL
R/W-0
POLH
R/W-0
POLL
R/W-0
R/W-0
PMOD<1:0>(1)
R/W-0
OVRENH
R/W-0
OVRENL
bit 8
R/W-0
R/W-0
OVRDAT<1:0>
bit 7
R/W-0
R/W-0
FLTDAT<1:0>
R/W-0
R/W-0
CLDAT<1:0>
R/W-0
SWAP
R/W-0
OSYNC
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9
bit 8
bit 7-6
bit 5-4
PENH: PWMH Output Pin Ownership bit
1 = PWM module controls PWMxH pin
0 = GPIO module controls PWMxH pin
PENL: PWML Output Pin Ownership bit
1 = PWM module controls PWMxL pin
0 = GPIO module controls PWMxL pin
POLH: PWMH Output Pin Polarity bit
1 = PWMxH pin is active-low
0 = PWMxH pin is active-high
POLL: PWML Output Pin Polarity bit
1 = PWMxL pin is active-low
0 = PWMxL pin is active-high
PMOD<1:0>: PWM # I/O Pin Mode bits(1)
00 = PWM I/O pin pair is in the Complementary Output mode
01 = PWM I/O pin pair is in the Redundant Output mode
10 = PWM I/O pin pair is in the Push-Pull Output mode
11 = PWM I/O pin pair is in the True Independent Output mode
OVRENH: Override Enable for PWMxH Pin bit
1 = OVRDAT<1> provides data for output on PWMxH pin
0 = PWM generator provides data for PWMxH pin
OVRENL: Override Enable for PWMxL Pin bit
1 = OVRDAT<0> provides data for output on PWMxL pin
0 = PWM generator provides data for PWMxL pin
OVRDAT<1:0>: Data for PWMxH and PWMxL Pins if Override is Enabled bits
If OVERENH = 1 then OVRDAT<1> provides data for PWMxH.
If OVERENL = 1 then OVRDAT<0> provides data for PWMxL.
FLTDAT<1:0>: Data for PWMxH and PWMxL Pins if FLTMOD is Enabled bits
FCLCONx<IFLTMOD> = 0: Normal Fault mode:
If Fault active, then FLTDAT<1> provides data for PWMxH.
If Fault active, then FLTDAT<0> provides data for PWMxL.
FCLCONx<IFLTMOD> = 1: Independent Fault mode:
If current-limit active, then FLTDAT<1> provides data for PWMxH.
If Fault active, then FLTDAT<0> provides data for PWMxL.
Note 1: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
yield unpredictable results.
DS70318D-page 210
Preliminary
© 2009 Microchip Technology Inc.