DSPIC33FJ16GS402-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ16GS402-I/ML Datasheet PDF : 346 Pages
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
TABLE 22-2: INSTRUCTION SET OVERVIEW (CONTINUED)
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
29
DIV
30
DIVF
31
DO
32
ED
DIV.S
DIV.SD
DIV.U
DIV.UD
DIVF
DO
DO
ED
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
#lit14,Expr
Wn,Expr
Wm*Wm,Acc,Wx,Wy,Wxd
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Signed 16/16-bit Fractional Divide
Do code to PC + Expr, lit14 + 1 times
Do code to PC + Expr, (Wn) + 1 times
Euclidean Distance (no accumulate)
33
EDAC
EDAC
Wm*Wm,Acc,Wx,Wy,Wxd
Euclidean Distance
34
EXCH
35
FBCL
36
FF1L
37
FF1R
38
GOTO
39
INC
40
INC2
41
IOR
42
LAC
EXCH
FBCL
FF1L
FF1R
GOTO
GOTO
INC
INC
INC
INC2
INC2
INC2
IOR
IOR
IOR
IOR
IOR
LAC
Wns,Wnd
Ws,Wnd
Ws,Wnd
Ws,Wnd
Expr
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Wso,#Slit4,Acc
Swap Wns with Wnd
Find Bit Change from Left (MSb) Side
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
Go to Address
Go to Indirect
f=f+1
WREG = f + 1
Wd = Ws + 1
f=f+2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Load Accumulator
43
LNK
44
LSR
45
MAC
LNK
#lit14
Link Frame Pointer
LSR
f
f = Logical Right Shift f
LSR
f,WREG
WREG = Logical Right Shift f
LSR
Ws,Wd
Wd = Logical Right Shift Ws
LSR
Wb,Wns,Wnd
Wnd = Logical Right Shift Wb by Wns
LSR
Wb,#lit5,Wnd
Wnd = Logical Right Shift Wb by lit5
MAC
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd Multiply and Accumulate
,
AWB
MAC
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd Square and Accumulate
46
MOV
MOV
f,Wn
Move f to Wn
MOV
f
Move f to f
MOV
f,WREG
Move f to WREG
MOV
#lit16,Wn
Move 16-Bit Literal to Wn
MOV.b #lit8,Wn
Move 8-Bit Literal to Wn
MOV
Wn,f
Move Wn to f
MOV
Wso,Wdo
Move Ws to Wd
MOV
WREG,f
Move WREG to f
MOV.D
Wns,Wd
Move Double from W(ns):W(ns + 1) to Wd
MOV.D
Ws,Wnd
Move Double from Ws to W(nd + 1):W(nd)
47
MOVSAC
MOVSAC Acc,Wx,Wxd,Wy,Wyd,AWB
Prefetch and Store Accumulator
# of # of Status Flags
Words Cycles Affected
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
18
N,Z,C,OV
2
2
None
2
2
None
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
C
1
1
C
1
1
C
2
2
None
1
2
None
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
OA,OB,OAB,
SA,SB,SAB
1
1
None
1
1
N,Z
1
1
N,Z
1
1
None
1
1
None
1
1
None
1
1
None
1
1
N,Z
1
2
None
1
2
None
1
1
None
DS70318D-page 276
Preliminary
© 2009 Microchip Technology Inc.
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