TABLE 3-3: CORE REGISTER MAP (CONTINUED)
SFR Name
Address
(Home)
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4
CORCON
0044
—
—
—
US
EDT DL2
DL1
DL0 SATA SATB SATDW ACCSAT
MODCON
0046 XMODEN YMODEN —
—
BWM<3:0>
YWM<3:0>
XMODSRT 0048
XS<15:1>
XMODEND 004A
XE<15:1>
YMODSRT 004C
YS<15:1>
YMODEND 004E
YE<15:1>
XBREV
0050
BREN
XB<14:0>
DISICNT
0052
—
—
DISICNT<13:0>
Legend:
Note:
u = uninitialized bit; — = unimplemented bit, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Bit 3
IPL3
Bit 2 Bit 1 Bit 0
Reset State
PSV RND
XWM<3:0>
IF 0000 0000 0010 0000
0000 0000 0000 0000
0 uuuu uuuu uuuu uuu0
1 uuuu uuuu uuuu uuu1
0 uuuu uuuu uuuu uuu0
1 uuuu uuuu uuuu uuu1
uuuu uuuu uuuu uuuu
0000 0000 0000 0000