SP828EK View Datasheet(PDF) - Signal Processing Technologies
Part Name
Description
Manufacturer
SP828EK Datasheet PDF : 16 Pages
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IN
2
+VIN
OFF
ON
Shutdown
Logic
C1+
5
SP828
SP829
GND
C1
4
CIN
0.1µF
C1- 3
1 OUT
VOUT
C2
Figure 25. SP828/829 Device with Shutdown Control
Combining a Doubler and Inverter Circuit
A designer can connect a SP828/829 device in a
combination doubler/inverter circuit as seen in
Figure 24. The doubler uses capacitors C3 and
C4 while the inverter uses C1 and C2. Loading
either output decreases both output voltages to
GND because both the doubler and the inverter
circuits use the charge pump. Designers should
not allow the total current output from the doubler
and the inverter to exceed 40mA.
Connecting in Parallel
A designer can parallel a number of SP828/829
devices to reduce the output resistance for specific
designs. All devices will need their own flying
capacitor, C1, but a single output capacitor will
serve all of the devices connected in parallel by
increasing the capacitance of C2 by a factor of n
where n equals the total number of devices
connected. This connection can be found in
Figure 26.
Implementing Shutdown
If shutdown control of the SP828/829 devices is
necessary, the circuit found in Figure 25 can be
implemented. The 0.1µF capacitor at IN absorbs
transient input currents. The output resistance of
the devices can be determined by the following
equation:
R = 20 + 2 x R ,
OUT
BUFFER
where ROUT is the output resistance and RBUFFER
is the output resistance of the buffer driving IN.
RBUFFER can be reduced by connecting multiple
buffers in parallel at IN. The polarity of the
SHUTDOWN signal can be changed by using a
noninverting buffer to drive IN.
Cascading Devices
A designer can cascade SP828/829 devices to
produce a larger inverted voltage output. Refer
to Figure 27 for this circuit connection. With two
cascaded devices, the unloaded output voltage is
decreased by the output resistance of the first
device multiplied by the quiescent current of the
second device connected. The total output
resistance is greatly increased when more than
two devices are cascaded.
Layout and Grounding
Designers should make an effort to minimize
noise by paying special attention to the circuit
layout with the SP828/829 devices. External
components should be connected in close
proximity to the device and a ground plane
should be implemented. This will keep electrical
traces short minimizing parasitic inductance and
capacitance.
SP828DS/03
SP828/829 High Efficiency Voltage Inverters
13
© Copyright 1999 Sipex Corporation
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