ST7PLITEU09M3TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PLITEU09M3TR

8-bit MCU with single voltage Flash memory, ADC, timers

STMicroelectronics 

ST7LITEU05 ST7LITEU09

ST7 ADDRESSING MODES (cont’d)

12.1.1 Inherent

All Inherent instructions consist of a single byte.

The opcode fully specifies all the required informa-

tion for the CPU to process the operation.

Inherent Instruction

NOP

TRAP

WFI

HALT

RET

IRET

SIM

RIM

SCF

RCF

RSP

LD

CLR

PUSH/POP

INC/DEC

TNZ

CPL, NEG

MUL

SLL, SRL, SRA, RLC,

RRC

SWAP

Function

No operation

S/W Interrupt

Wait For Interrupt (Low Power

Mode)

Halt Oscillator (Lowest Power

Mode)

Subroutine Return

Interrupt Subroutine Return

Set Interrupt Mask

Reset Interrupt Mask

Set Carry Flag

Reset Carry Flag

Reset Stack Pointer

Load

Clear

Push/Pop to/from the stack

Increment/Decrement

Test Negative or Zero

1 or 2 Complement

Byte Multiplication

Shift and Rotate Operations

Swap Nibbles

12.1.2 Immediate

Immediate instructions have 2 bytes, the first byte

contains the opcode, the second byte contains the

operand value.

Immediate Instruction

LD

CP

BCP

AND, OR, XOR

ADC, ADD, SUB, SBC

Function

Load

Compare

Bit Compare

Logical Operations

Arithmetic Operations

12.1.3 Direct

In Direct instructions, the operands are referenced

by their memory address.

The direct addressing mode consists of two sub-

modes:

Direct (Short)

The address is a byte, thus requires only 1 byte af-

ter the opcode, but only allows 00 - FF addressing

space.

Direct (Long)

The address is a word, thus allowing 64 Kbyte ad-

dressing space, but requires 2 bytes after the op-

code.

12.1.4 Indexed (No Offset, Short, Long)

In this mode, the operand is referenced by its

memory address, which is defined by the unsigned

addition of an index register (X or Y) with an offset.

The indirect addressing mode consists of three

submodes:

Indexed (No Offset)

There is no offset (no extra byte after the opcode),

and allows 00 - FF addressing space.

Indexed (Short)

The offset is a byte, thus requires only 1 byte after

the opcode and allows 00 - 1FE addressing space.

Indexed (Long)

The offset is a word, thus allowing 64 Kbyte ad-

dressing space and requires 2 bytes after the op-

code.

12.1.5 Indirect (Short, Long)

The required data byte to do the operation is found

by its memory address, located in memory (point-

er).

The pointer address follows the opcode. The indi-

rect addressing mode consists of two submodes:

Indirect (Short)

The pointer address is a byte, the pointer size is a

byte, thus allowing 00 - FF addressing space, and

requires 1 byte after the opcode.

Indirect (Long)

The pointer address is a byte, the pointer size is a

word, thus allowing 64 Kbyte addressing space,

and requires 1 byte after the opcode.

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