STM8AF6226UDU View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STM8AF6226UDU
STMicroelectronics
STM8AF6226UDU Datasheet PDF : 89 Pages
| |||
STM8AF61xx, STM8AF62xx
Electrical characteristics
10.3.6 I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All
unused pins must be kept at a fixed voltage, using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
Table 37. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
-0.3 V
0.3 x VDD
VIH
Input high level voltage
0.7 x VDD
VDD + 0.3 V
Vhys
Hysteresis(1)
-
0.1 x
VDD
-
—
Standard I/0, VDD = 5 V,
I = 3 mA
VDD - 0.5 V
-
-
VOH
Output high level voltage
Standard I/0, VDD = 3 V,
I = 1.5 mA
VDD - 0.4 V
-
-
High sink and true open
drain I/0, VDD = 5 V
-
I = 8 mA
-
0.5
VOL
Output low level voltage
Standard I/0, VDD = 5 V
I = 3 mA
-
Standard I/0, VDD = 3 V
I = 1.5 mA
-
Rpu
Pull-up resistor
VDD = 5 V, VIN = VSS
35
Fast I/Os
Load = 50 pF
-
tR, tF
Rise and fall time
(10% - 90%)
Standard and high sink I/Os
Load = 50 pF
-
Fast I/Os
Load = 20 pF
-
0.6
V
-
0.4
50
65
kΩ
-
35(2)
-
125(2)
ns
20(2)
Standard and high sink I/Os
Load = 20 pF
Ilkg
Digital input pad leakage
current
VSS ≤VIN ≤VDD
-
Ilkg ana
Analog input pad leakage
current
VSS ≤ VIN ≤ VDD
-40 °C < TA < 125 °C
VSS ≤ VIN ≤ VDD
-40 °C < TA < 150 °C
-
-
Ilkg(inj)
Leakage current in
adjacent I/O(3)
Injection current ±4 mA
-
50(2)
-
±1
µA
-
±250
nA
-
±500
-
±1(3)
µA
IDDIO
Total current on either
VDDIO or VSSIO
Including injection currents
-
-
60
mA
1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
Doc ID 14952 Rev 6
59/89
Share Link: 