STM8AP6268TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8AP6268TC

Automotive 8-bit MCU, with up to32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5V

STMicroelectronics 

STM8AF61xx, STM8AF62xx

Revision history

Table 52. Document revision history (continued)

Date

Revision

Changes

31-Jan-2011

18-Jul-2012

5

(continued)

Renamed Fast Active Halt mode to Active-halt mode with regulator

on, and Slow Active Halt mode to Active-halt mode with regulator off.

Updated Table 26: Total current consumption in Halt and Active-halt

modes. General conditions for VDD apply, TA = -40 to 55 °C, in

particular IDD(FAH) and IDD(SAH) renamed IDD(AH); tWU(FAH) and

tWU(SAH) renamed tWU(AH), and temperature condition added.

Removed IDD(USART) from Table 29: Typical peripheral current

consumption VDD = 5.0 V.

Updated general conditions in Section 10.3.5: Memory

characteristics. Modified TWE maximum value in Table 35: Flash

program memory and Table 36: Data memory.

Update Ilkg ana maximum value for TA ranging from −40 to 150 °C in

Table 37: I/O static characteristics.

Added tIFP(NRST) and renamed VF(NRST) tIFP in Table 38: NRST pin

characteristics. Added recommendations concerning NRST pin level

above Figure 36: Recommended reset pin protection, and updated

external capacitor value.

Added Raisonance compiler in Section 13.2: Software tools.

Moved know limitations to separate errata sheet.

Updated wildcards of document part numbers.

Table 1: Device summary: updated footnote 1 and added footnote 2

to all STM8AF61xx part numbers.

Section 1: Introduction: small text change in first paragraph.

Table 2: STM8AF62xx product line-up: added “P” version for all order

codes; updated RAM.

Table 3: STM8AF/H61xx product line-up: added “P” version for all

order codes.

Figure 1: STM8A block diagram: updated POR, BOR and WDG;

updated LINUART input; added legend.

Section 5.4: Flash program and data EEPROM: removed

nonrelevant bullet points and added a sentence about the factory

programme.

6

Table 4: Peripheral clock gating bit assignments in CLK_PCKENR1/2

registers: updated

ADC features: updated ADC input range.

Table 11: Memory model for the devices covered in this datasheet:

updated 16 Kbyte and 8 Kbyte information.

Table 17: Option bytes: updated factory default setting for NOPT17;

added footnote 1.

Section 10.1.1: Minimum and maximum values: TA = -40 °C (not

40 °C).

Table 23: General operating conditions: updated VCAP.

Table 25: Total current consumption in Run, Wait and Slow mode.

General conditions for VDD apply, TA = -40 to 150 °C: updated

conditions for IDD(RUN).

Table 37: I/O static characteristics: added new condition and new

max values for rise and fall time; updated footnote 2.

Doc ID 14952 Rev 6

87/89

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