DSPIC33FJ32GP802-I/SP View Datasheet(PDF) - Microchip Technology
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Description
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DSPIC33FJ32GP802-I/SP Datasheet PDF : 402 Pages
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
20.0 DATA CONVERTER
INTERFACE (DCI) MODULE
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GP302/304,
dsPIC33FJ64GPX02/X04,
and
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 20. Data Converter
Interface (DCI)” (DS70288) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
20.1 Module Introduction
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04, and dsPIC33FJ128GPX02/X04 Data Converter
Interface (DCI) module allows simple interfacing of
devices, such as audio coder/decoders (Codecs), ADC
and D/A converters. The following interfaces are sup-
ported:
• Framed Synchronous Serial Transfer (Single or
Multi-Channel)
• Inter-IC Sound (I2S) Interface
• AC-Link Compliant mode
• The DCI module provides the following general
features:
• Programmable word size up to 16 bits
• Supports up to 16 time slots, for a maximum
frame size of 256 bits
• Data buffering for up to 4 samples without CPU
overhead
FIGURE 20-1:
DCI MODULE BLOCK DIAGRAM
FOSC/4
Word Size Selection bits
Frame Length Selection bits
DCI Mode Selection bits
Receive Buffer
Registers w/Shadow
Transmit Buffer
Registers w/Shadow
BCG Control bits
Sample Rate
Generator
Frame
Synchronization
Generator
SCKD
FSD
DCI Buffer
Control Unit
15
0
DCI Shift Register
CSCK
COFS
CSDI
CSDO
2009 Microchip Technology Inc.
Preliminary
DS70292D-page 247
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