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DSPIC33FJ64GP802-H/SP View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
DSPIC33FJ64GP802-H/SP
Microchip
Microchip Technology 
DSPIC33FJ64GP802-H/SP Datasheet PDF : 402 Pages
First Prev 271 272 273 274 275 276 277 278 279 280 Next Last
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 24-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER(1) (CONTINUED)
bit 7-0
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
00000001 = Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
Note 1: The RCFGCAL register is only affected by a POR.
2: A write to the RTCEN bit is only allowed when RTCWREN = 1.
3: This bit is read-only. It is cleared to ‘0’ on a write to the lower half of the MINSEC register.
DS70292D-page 280
Preliminary
2009 Microchip Technology Inc.

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