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DSPIC33FJ128GP304T-I View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
DSPIC33FJ128GP304T-I
Microchip
Microchip Technology 
DSPIC33FJ128GP304T-I Datasheet PDF : 402 Pages
First Prev 291 292 293 294 295 296 297 298 299 300 Next Last
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
26.0 PARALLEL MASTER PORT
(PMP)
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GP302/304,
dsPIC33FJ64GPX02/X04,
and
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 35. Parallel Master
Port (PMP)” (DS70299) of the
dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
The Parallel Master Port (PMP) module is a parallel
8-bit I/O module, specifically designed to communi-
cate with a wide variety of parallel devices, such as
communication peripherals, LCDs, external memory
FIGURE 26-1:
PMP MODULE OVERVIEW
dsPIC33F
Parallel Master Port
PMA<0>
PMALL
PMA<1>
PMALH
PMA<10:2>(1)
PMA<14>
PMCS1
devices and microcontrollers. Because the interface
to parallel peripherals varies significantly, the PMP is
highly configurable.
Key features of the PMP module include:
• Fully multiplexed address/data mode
• Demultiplexed or partially multiplexed address/
data mode
- up to 11 address lines with single chip select
- up to 12 address lines without chip select
• One Chip Select Line
• Programmable Strobe Options
- Individual Read and Write Strobes or;
- Read/Write Strobe with Enable Strobe
• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port Support
• Enhanced Parallel Slave Support
- Address Support
- 4-Byte Deep Auto-Incrementing Buffer
• Programmable Wait States
• Selectable Input Voltage Levels
Address Bus
Data Bus
Control Lines
Up to 11-Bit Address
EEPROM
PMBE
PMRD
PMRD/PMWR
PMWR
PMENB
Microcontroller
LCD
FIFO
Buffer
PMD<7:0>
PMA<7:0>
PMA<10:8>
Note 1: 28-pin devices do not have PMA<10:2>.
8-Bit Data
2009 Microchip Technology Inc.
Preliminary
DS70292D-page 291

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