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DSPIC33FJ64GP204T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
DSPIC33FJ64GP204T-I/SO
Microchip
Microchip Technology 
DSPIC33FJ64GP204T-I/SO Datasheet PDF : 402 Pages
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
TABLE 30-9: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C TA +85°C for Industrial
-40°C TA +125°C for Extended
Param
No.
Symbol
Characteristic
Min
Typ(1) Max Units
Conditions
VIL
Input Low Voltage
DI10
I/O pins
VSS
— 0.2 VDD V
DI11
PMP pins
VSS
— 0.15 VDD V PMPTTL = 1
DI15
MCLR
VSS
0.2 VDD V
DI16
I/O Pins with OSC1 or SOSCI
VSS
— 0.2 VDD V
DI18
I/O Pins with SDAx, SCLx
VSS
— 0.3 VDD V SMbus disabled
DI19
I/O Pins with SDAx, SCLx
VSS
— 0.2 VDD V SMbus enabled
VIH
Input High Voltage
DI20
I/O Pins Not 5V Tolerant(4)
I/O Pins 5V Tolerant(4)
0.7 VDD
0.7 VDD
VDD
V
5.5
V
DI21
I/O Pins Not 5V Tolerant with 0.24 VDD + 0.8 —
VDD
V
PMP(4)
I/O Pins 5V Tolerant with
0.24 VDD + 0.8 —
5.5
V
PMP(4)
ICNPU CNx Pull-up Current
DI30
50
250
400
A VDD = 3.3V, VPIN = VSS
IIL
Input Leakage Current(2)(3)
DI50
I/O pins 5V Tolerant(4)
±2
A VSS VPIN VDD,
Pin at high-impedance
DI51
I/O Pins Not 5V Tolerant(4)
±1
A VSS VPIN VDD,
Pin at high-impedance,
40°C TA +85°C
DI51a
I/O Pins Not 5V Tolerant(4)
±2
A Shared with external
reference pins,
40°C TA +85°C
DI51b
I/O Pins Not 5V Tolerant(4)
±3.5
A VSS VPIN VDD, Pin
at high-impedance,
-40°C TA +125°C
DI51c
I/O Pins Not 5V Tolerant(4)
±8
A Analog pins shared
with external reference
pins,
-40°C TA +125°C
DI55
MCLR
±2
A VSS VPIN VDD
DI56
OSC1
±2
A VSS VPIN VDD,
XT and HS modes
Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current can be measured at different input
voltages.
3: Negative current is defined as current sourced by the pin.
4: See “Pin Diagrams” for the 5V tolerant I/O pins.
2009 Microchip Technology Inc.
Preliminary
DS70292D-page 327

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