DSPIC33FJ64GP204T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33FJ64GP204T-I/SO

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

TABLE 30-32: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE)

AC CHARACTERISTICS

Standard Operating Conditions: 3.0V to 3.6V

(unless otherwise stated)

Operating temperature -40°C  TA  +85°C for Industrial

-40°C  TA  +125°C for Extended

Param

No.

Symbol

Characteristic

Min(1)

Max Units

Conditions

IM10

IM11

IM20

IM21

IM25

IM26

IM30

IM31

IM33

IM34

IM40

IM45

IM50

TLO:SCL Clock Low Time 100 kHz mode

400 kHz mode

1 MHz mode(2)

THI:SCL Clock High Time 100 kHz mode

400 kHz mode

1 MHz mode(2)

TF:SCL

SDAx and SCLx 100 kHz mode

Fall Time

400 kHz mode

1 MHz mode(2)

TR:SCL

SDAx and SCLx 100 kHz mode

Rise Time

400 kHz mode

1 MHz mode(2)

TSU:DAT Data Input

Setup Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

THD:DAT Data Input

Hold Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

TSU:STA Start Condition

Setup Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

THD:STA Start Condition

Hold Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

TSU:STO Stop Condition

Setup Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

THD:STO Stop Condition 100 kHz mode

Hold Time

400 kHz mode

1 MHz mode(2)

TAA:SCL Output Valid

From Clock

100 kHz mode

400 kHz mode

1 MHz mode(2)

TBF:SDA Bus Free Time 100 kHz mode

400 kHz mode

1 MHz mode(2)

CB

Bus Capacitive Loading

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

—

20 + 0.1 CB

—

—

20 + 0.1 CB

—

250

100

40

0

0

0.2

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

TCY/2 (BRG + 1)

—

—

—

4.7

1.3

0.5

—

—

—

—

—

—

—

300

300

100

1000

300

300

—

—

—

—

0.9

—

—

—

—

—

—

—

—

—

—

—

—

—

3500

1000

400

—

—

—

400

s

—

s

—

s

—

s

—

s

—

s

—

ns CB is specified to be

ns from 10 to 400 pF

ns

ns CB is specified to be

ns from 10 to 400 pF

ns

ns

—

ns

ns

s

—

s

s

s Only relevant for

s Repeated Start

s condition

s After this period the

s first clock pulse is

s generated

s

—

s

s

ns

—

ns

ns

ns

—

ns

—

ns

—

s Time the bus must be

s free before a new

s transmission can start

pF

—

IM51 TPGD Pulse Gobbler Delay

65

390

ns

See Note 3

Note 1: BRG is the value of the I2C Baud Rate Generator. Refer to Section 19. “Inter-Integrated Circuit™

(I2C™)” (DS70195) in the “dsPIC33F/PIC24H Family Reference Manual”. Please see the Microchip web-

site (www.microchip.com) for the latest dsPIC33F Family Reference Manual chapters.

2: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).

3: Typical value for this parameter is 130 ns.

DS70292D-page 346

Preliminary

 2009 Microchip Technology Inc.

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