DSPIC33FJ64GP804T-E/ML View Datasheet(PDF) - Microchip Technology
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Description
Manufacturer
DSPIC33FJ64GP804T-E/ML Datasheet PDF : 402 Pages
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TABLE 4-1: CPU CORE REGISTERS MAP (CONTINUED)
SFR Name
SFR
Addr
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
XMODSRT 0048
XS<15:1>
XMODEND 004A
XE<15:1>
YMODSRT 004C
YS<15:1>
YMODEND 004E
YE<15:1>
XBREV
0050
BREN
XB<14:0>
DISICNT
0052
—
—
Disable Interrupts Counter Register
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
1
All
Resets
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
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