DSPIC33FJ64GP804T-E/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33FJ64GP804T-E/ML

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

TABLE 4-33: SYSTEM CONTROL REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13

Bit 12

Bit 11 Bit 10 Bit 9 Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3 Bit 2

Bit 1

Bit 0

All

Resets

RCON

OSCCON

CLKDIV

PLLFBD

OSCTUN

ACLKCON

Legend:

Note 1:

2:

0740 TRAPR IOPUWR —

—

—

—

CM VREGS EXTR

SWR SWDTEN WDTO SLEEP IDLE

BOR

POR

0742 —

COSC<2:0>

—

NOSC<2:0>

CLKLOCK IOLOCK LOCK

—

CF

— LPOSCEN OSWEN

0744 ROI

DOZE<2:0>

DOZEN

FRCDIV<2:0>

PLLPOST<1:0>

—

PLLPRE<4:0>

0746 —

—

—

—

—

—

—

PLLDIV<8:0>

0748 —

—

—

—

—

—

—

—

—

—

TUN<5:0>

074A —

— SELACLK

AOSCMD<1:0>

APSTSCLR<2:0>

ASRCSEL —

—

—

—

—

—

—

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

RCON register Reset values dependent on type of Reset.

OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.

xxxx(1)

0300(2)

3040

0030

0000

0000

TABLE 4-34: SECURITY REGISTER MAP(1)

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9

Bit 8

Bit 7

BSRAM

SSRAM

Legend:

Note 1:

0750

—

—

—

—

—

—

—

—

—

0752

—

—

—

—

—

—

—

—

—

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

This register is not present in devices with 4K RAM and 32K Flash memory.

Bit 6

—

—

Bit 5

—

—

Bit 4

—

—

Bit 3

—

—

Bit 2

IW_BSR

IW_ SSR

Bit 1

IR_BSR

IR_SSR

Bit 0

All

Resets

RL_BSR 0000

RL_SSR 0000

TABLE 4-35: NVM REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10

Bit 9

Bit 8

Bit 7

NVMCON

NVMKEY

Legend:

0760

WR

WREN WRERR

—

—

—

—

—

—

0766

—

—

—

—

—

—

—

—

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Bit 6

ERASE

Bit 5

—

Bit 4

Bit 3

—

NVMKEY<7:0>

Bit 2

Bit 1

NVMOP<3:0>

Bit 0

All

Resets

0000

0000

TABLE 4-36: PMD REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

PMD1

PMD2

PMD3

Legend:

0770 T5MD T4MD T3MD T2MD T1MD

—

—

DCIMD I2C1MD

0772 IC8MD IC7MD

—

—

—

—

IC2MD IC1MD

—

0774

—

—

—

—

— CMPMD RTCCMD PMPMD CRCMD

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

U2MD

—

DAC1MD

U1MD

—

—

Bit 4

Bit 3

Bit 2

SPI2MD

—

—

SPI1MD

OC4MD

—

—

OC3MD

—

Bit 1

C1MD

OC2MD

—

Bit 0

All

Resets

AD1MD

OC1MD

—

0000

0000

0000

Share Link: