DSPIC33FJ32GP302T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33FJ32GP302T-I/SO

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

REGISTER 7-2: CORCON: CORE CONTROL REGISTER(1)

U-0

—

bit 15

U-0

U-0

R/W-0

R/W-0

R-0

—

—

US

EDT

R-0

DL<2:0>

R-0

bit 8

R/W-0

SATA

bit 7

R/W-0

SATB

R/W-1

SATDW

R/W-0

ACCSAT

R/C-0

IPL3(2)

R/W-0

PSV

R/W-0

RND

R/W-0

IF

bit 0

Legend:

R = Readable bit

0’ = Bit is cleared

C = Clear only bit

W = Writable bit

‘x = Bit is unknown

-n = Value at POR

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

bit 3

IPL3: CPU Interrupt Priority Level Status bit 3(2)

1 = CPU interrupt priority level is greater than 7

0 = CPU interrupt priority level is 7 or less

Note 1: For complete register details, see Register 3-2: “CORCON: Core Control Register”.

2: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 93

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