Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
10.8.2.3 Analog Continuous Time Type A Block xx Control 2 Register
CPhase controls which internal clock phase the compar-
ator data is latched on.
can be obtained if the amplifier is being used as a com-
parator.
CLatch controls whether the latch is active or if it is
always transparent.
TestMux – selects block bypass mode for testing and
characterization purposes.
CompCap controls whether the compensation capacitor
is switched in or not in the op-amp. By not switching in
the compensation capacitance, a much faster response
Power – encoding for selecting 1 of 4 power levels. The
blocks always power up in the off state.
Table 67: Analog Continuous Time Type A Block xx Control 2 Register
Bit #
POR
Read/
Write
Bit Name
7
0
RW
CPhase
6
0
RW
CLatch
5
4
3
2
0
0
0
0
RW
RW
RW
RW
CompCap TestMux[2] TestMux[1] TestMux[0]
1
0
RW
Power[1]
0
0
RW
Power[0]
Bit 7: CPhase
0 = Comparator Control latch transparent on PHI1
1 = Comparator Control latch transparent on PHI2
Bit 6: CLatch
0 = Comparator Control latch is always transparent
1 = Comparator Control latch is active
Bit 5: CompCap
0 = Comparator Mode
1 = Op-amp Mode
Bit [4:2]: TestMux [2:0] Select block bypass mode for testing and characterization purposes
ACA00 ACA01
ACA02 ACA03
1 0 0 = Positive Input to… ABUS0 ABUS1 ABUS2 ABUS3
1 0 1 = AGND to…
ABUS0 ABUS1 ABUS2 ABUS3
1 1 0 = REFLO to…
ABUS0 ABUS1 ABUS2 ABUS3
1 1 1 = REFHI to…
ABUS0 ABUS1 ABUS2 ABUS3
0 x x = All Paths Off
Bit [1:0]: Power [1:0] Encoding for selecting 1 of 4 power levels
0 0 = Off
0 1 = Low (60 µA)
1 0 = Med (150 µA)
1 1 = High (500 µA)
Analog Continuous Time Block 00 Control 2 Register (ACA00CR2, Address = Bank 0/1, 73h)
Analog Continuous Time Block 01 Control 2 Register (ACA01CR2, Address = Bank 0/1, 77h)
Analog Continuous Time Block 02 Control 2 Register (ACA02CR2, Address = Bank 0/1, 7Bh)
Analog Continuous Time Block 03 Control 2 Register (ACA03CR2, Address = Bank 0/1, 7Fh)
82
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002