3803 Group (Spec.H QzROM version)
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Electrical characteristics
Table 13 Electrical characteristics (1)
(VCC = 1.8 to 5.5 V, VSS = 0V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Unit
Min.
Typ.
Max.
VOH
“H” output voltage(1)
IOH = −10 mA
VCC − 2.0
V
P00-P07, P10-P17, P20-P27, P30, P31,
VCC = 4.0 to 5.5 V
P34-P37, P40-P47, P50-P57, P60-P67
IOH = –1.0 mA
VCC − 1.0
VCC = 1.8 to 5.5 V
VOL
“L” output voltage
IOL = 10 mA
P00-P07, P10-P17, P20-P27, P30-P37,
VCC = 4.0 to 5.5 V
P40-P47, P50-P57, P60-P67
IOL = 1.6 mA
VCC = 1.8 to 5.5 V
2.0
V
1.0
VOL
“L” output voltage
P20-P27
IOL = 20 mA
VCC = 4.0 to 5.5 V
2.0
V
IOL = 1.6 mA
0.4
VCC = 1.8 to 5.5 V
VT+ − VT−
Hysteresis
CNTR0, CNTR1, CNTR2, INT0-INT4
0.4
V
VT+ − VT−
Hysteresis
RxD1, SCLK1, SIN2, SCLK2, RxD3, SCLK3
0.5
V
VT+ − VT−
Hysteresis
RESET
0.5
V
IIH
“H” input current
VI = VCC
P00-P07, P10-P17, P20-P27, P30-P37,
(Pin floating,
P40-P47, P50-P57, P60-P67
Pull-up transistor “off”)
5.0
µA
IIH
“H” input current
RESET, CNVSS
VI = VCC
5.0
µA
IIH
“H” input current
XIN
VI = VCC
4.0
µA
IIL
“L” input current
VI = VCC
P00-P07, P10-P17, P20-P27, P30-P37,
(Pin floating,
P40-P47, P50-P57, P60-P67
Pull-up transistor “off”)
−5.0
µA
IIL
“L” input current
RESET, CNVSS
VI = VSS
−5.0
µA
IIL
“L” input current
XIN
VI = VSS
−4.0
µA
IIL
“L” input current (at Pull-up)
VI = VSS
P00-P07, P10-P17, P20-P27, P30, P31,
VCC = 5.0 V
P34-P37, P40-P47, P50-P57, P60-P67
VI = VSS
VCC = 3.0 V
−80
−210
−420
µA
−30
−70
−140
VRAM
RAM hold voltage
When clock stopped
1.8
VCC
V
NOTES:
1. P35 is measured when the P35/TXD3 P-channel output disable bit of the UART3 control register (bit 4 of address 003316) is “0”.
P45 is measured when the P45/TXD1 P-channel output disable bit of the UART1 control register (bit 4 of address 001B16) is “0”.
Rev.1.10 Nov 14, 2005 Page 73 of 91
REJ03B0166-0110