N25Q128A33BSF40E View Datasheet(PDF) - Numonyx -> Micron

Part Name

Description

Manufacturer

N25Q128A33BSF40E

128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Numonyx -> Micron 

N25Q128 - 3 V

Figure 83. Program/Erase Resume instruction sequence QIO-SPI

S

01

C

Instruction

DQ0

Instructions

DQ1

DQ2

DQ3

9.3.13

Quad_Program_Erase_Resume

Read Status Register (RDSR)

The Read Status Register (RDSR) instruction allows the Status Register to be read.

Apart form the parallelizing of the instruction code and the output data on the four pins DQ0,

DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Read Status

Register (RDSR) instruction of the Extended SPI protocol, please refer to Section 9.1.22:

Read Status Register (RDSR) for further details.

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