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PIC16LF1519T-I/SS View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16LF1519T-I/SS
Microchip
Microchip Technology 
PIC16LF1519T-I/SS Datasheet PDF : 376 Pages
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4.3 Code Protection
Code protection allows the device to be protected from
unauthorized access. Program memory protection is
controlled independently. Internal access to the
program memory is unaffected by any code protection
setting.
4.3.1 PROGRAM MEMORY PROTECTION
The entire program memory space is protected from
external reads and writes by the CP bit in Configuration
Words. When CP = 0, external reads and writes of
program memory are inhibited and a read will return all
0’s. The CPU can continue to read program memory,
regardless of the protection bit settings. Writing the
program memory is dependent upon the write
protection setting. See Section 4.4 “Write
Protection” for more information.
4.4 Write Protection
Write protection allows the device to be protected from
unintended self-writes. Applications, such as
bootloader software, can be protected while allowing
other regions of the program memory to be modified.
The WRT<1:0> bits in Configuration Words define the
size of the program memory block that is protected.
4.5 User ID
Four memory locations (8000h-8003h) are designated as
ID locations where the user can store checksum or other
code identification numbers. These locations are
readable and writable during normal execution. See
Section 11.4 “User ID, Device ID and Configuration
Word Access” for more information on accessing these
memory locations. For more information on checksum
calculation, see the PIC16(L)F151X/152X Memory
Programming Specification” (DS41442).
PIC16(L)F1516/7/8/9
2010-2012 Microchip Technology Inc.
DS41452C-page 45

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