QL8150-8PS484M(2002) View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL8150-8PS484M
(Rev.:2002)

Low Power FPGA Combining Performance, Density, and Embeded RAM

QuickLogic Corporation 

(FOLSVH,, )DPLO\ 'DWD 6KHHW 5HY %

QE

D

R

tISU

+

-

tSID

PAD

)LJXUH  (FOLSVH,, ,QSXW 5HJLVWHU &HOO

7DEOH  ,QSXW 5HJLVWHU &HOO

6\PERO

,QSXW

5HJLVWHU

&HOO 2QO\

3DUDPHWHU

9DOXH

0LQ 0D[

tISU

Input register setup time: time the synchronous input of the flip-flop must be stable

before the active clock edge

2.50 ns

-

tIHL

Input register hold time: time the synchronous input of the flip-flop must be stable

after the active clock edge

-

0 ns

tICO

Input register clock-to-out: time taken by the flip-flop to output after the active clock

edge

- 1.08 ns

Preliminary ‹  4XLFN/RJLF &RUSRUDWLRQ

ZZZTXLFNORJLFFRP ‡‡‡‡‡‡



Share Link: