EP3C5E324A8ES View Datasheet(PDF) - Altera Corporation

Part Name

Description

Manufacturer

EP3C5E324A8ES

Cyclone III Device Handbook

Altera Corporation 

Chapter 5: Clock Networks and PLLs in the Cyclone III Device Family

5–3

Clock Networks

Table 5–1. Cyclone III Device Family GCLK Network Connections (Part 2 of 2)

GCLK Network Clock

GCLK Networks (1)

Sources

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

PLL4_C1

PLL4_C2

PLL4_C3

PLL4_C4

DPCLK0

DPCLK1

DPCLK7 (4)

CDPCLK0, or

CDPCLK7 (2), (5)

DPCLK2 (4)

CDPCLK1, or

CDPCLK2 (2), (5)

DPCLK5 (4)

DPCLK7 (2)

DPCLK4 (4)

DPCLK6 (2)

DPCLK6 (4)

CDPCLK5, or

CDPCLK6 (2), (5)

DPCLK3 (4)

CDPCLK4, or

CDPCLK3 (2), (5)

DPCLK8

DPCLK11

DPCLK9

DPCLK10

DPCLK5

DPCLK2

DPCLK4

DPCLK3

————————————————v——v

———————————————v—v——

————————————————v—v—

—————————————————v—v

v———————————————————

—v——————————————————

——v—————————————————

— — — vv — — — — — — — — — — — — — — —

—————v——————————————

——————v—————————————

———————v————————————

— — — — — — — — vv — — — — — — — — — —

——————————v—————————

———————————v————————

————————————v———————

— — — — — — — — — — — — —vv— — — — —

———————————————v————

————————————————v———

—————————————————v——

— — — — — — — — — — — — — — — — — —vv

Notes to Table 5–1:

(1) EP3C5 and EP3C10 devices only have GCLK networks 0 to 9.

(2) These pins apply to all devices in the Cyclone III device family except EP3C5 and EP3C10 devices.

(3) EP3C5 and EP3C10 devices only have phase-locked loops (PLLs) 1 and 2.

(4) This pin applies only to EP3C5 and EP3C10 devices.

(5) Only one of the two CDPCLK pins can feed the clock control block. You can use the other pin as a regular I/O pin.

July 2012 Altera Corporation

Cyclone III Device Handbook

Volume 1

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