LTC2633HTS8-LI10-TRPBF View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC2633HTS8-LI10-TRPBF

Dual 12-/10-/8-Bit I2C VOUT DACs with 10ppm/°C Reference

Linear Technology 

Block Diagram

GND

VCC

VOUTA

DAC A

INTERNAL

REFERENCE

REF

SWITCH

VREF

DAC B

VOUTB

LTC2633

POWER-ON

RESET

CA0

I2C

ADDRESS

DECODE

CONTROL

DECODE LOGIC

I2C INTERFACE

SCL

SDA

2633 BD

Test Circuit Test circuits for I2C digital I/O (see Electrical Characteristics)

Test Circuit 1

100Ω

VIH(CA0)/VIL(CA0)

CA0

2633 TC01

Test Circuit 2

VDD

RINH/RINL/RINF

CA0

2633 TC02

GND

Timing Diagram

SDA

tf

SCL

tLOW

tr

tf

tSU(DAT)

tHD(STA)

tHD(STA)

tHD(DAT)

tHIGH

S

tSU(STA)

S

ALL VOLTAGE LEVELS REFER TO VIH(MIN) AND VIL(MAX) LEVELS

Figure 1. I2C Timing

tr

tBUF

tSP

tSU(STO)

P

S 2633 F01

START

SLAVE ADDRESS

1ST DATA BYTE

2ND DATA BYTE

3RD DATA BYTE

SDA

A6 A5 A4 A3 A2 A1 A0 W ACK C3 C2 C1 C0 A3 A2 A1 A0 ACK

ACK

X X X X ACK

SCL

12 3 4 5 6 7 8 9 1 2 34 56 7 8912 3 45 6 7 89 1 2 34 5 67 89

2633 F02

Figure 2. Typical LTC2633 Write Transaction

2633fb

15

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