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STM8S005K6T6CTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STM8S005K6T6CTR Datasheet PDF : 103 Pages
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Product overview
STM8S005K6 STM8S005C6
Timer Counter Prescaler
size
(bits)
Counting CAPCOM Complem. Ext. Timer
mode channels outputs trigger synchronization/
chaining
TIM4 8
Any power of 2 from Up
0
1 to 128
0
No
4.13
Analog-to-digital converter (ADC1)
The STM8S105xx products contain a 10-bit successive approximation A/D converter (ADC1)
with up to 10 multiplexed input channels and the following main features:
• Input voltage range: 0 to VDDA
• Conversion time: 14 clock cycles
• Single and continuous and buffered continuous conversion modes
• Buffer size (n x 10 bits) where n = number of input channels
• Scan mode for single and continuous conversion of a sequence of channels
• Analog watchdog capability with programmable upper and lower thresholds
• Analog watchdog interrupt
• External trigger input
• Trigger from TIM1 TRGO
• End of conversion (EOC) interrupt
Note: Additional AIN12 analog input is not selectable in ADC scan mode or with analog
watchdog. Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL
registers.
4.14
Communication interfaces
The following communication interfaces are implemented:
• UART2: Full feature UART, synchronous mode, SPI master mode, Smartcard mode, IrDA
mode, LIN2.1 master/slave capability
• SPI : Full and half-duplex, 8 Mbit/s
• I²C: Up to 400 Kbit/s
4.14.1
UART2
Main features
• One Mbit/s full duplex SCI
• SPI emulation
• High precision baud rate generator
• Smartcard emulation
• IrDA SIR encoder decoder
16/103
DocID022186 Rev 3

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