Memory and register map
STM8S005K6 STM8S005C6
Address
0x00 5208 to
0x00 520F
0x00 5210
0x00 5211
0x00 5212
0x00 5213
0x00 5214
Block Register label Register name
Reserved area (8 bytes)
I2C
I2C_CR1
I2C control register 1
I2C_CR2
I2C control register 2
I2C_FREQR
I2C frequency register
I2C_OARL
I2C Own address register low
I2C_OARH
I2C own address register high
0x00 5215
0x00 5216
0x00 5217
0x00 5218
0x00 5219
0x00 521A
0x00 521B
0x00 521C
0x00 521D
0x00 521E
Reserved
I2C_DR
I2C_SR1
I2C_SR2
I2C_SR3
I2C_ITR
I2C_CCRL
I2C_CCRH
I2C_TRISER
I2C_PECR
I2C data register
I2C status register 1
I2C status register 2
I2C status register 3
I2C interrupt control register
I2C clock control register low
I2C clock control register high
I2C TRISE register
I2C packet error checking register
0x00 521F to
0x00 522F
Reserved area (17 bytes)
0x00 5230 to
0x00 523F
Reserved area (6 bytes)
Reset status
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x02
0x00
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DocID022186 Rev 3