PIC16F913/914/916/917/946
FIGURE 19-6:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Start-Up Time
Internal Reset(1)
Watchdog Timer
Reset(1)
33
32
I/O pins
Note 1: Asserted low.
30
31
34
34
FIGURE 19-7:
BROWN-OUT RESET TIMING AND CHARACTERISTICS
VDD
VBOR
VBOR + VHYST
(Device in Brown-out Reset)
(Device not in Brown-out Reset)
37
33*
BOR Reset
(if PWRTE = 1)
BOR Reset
(if PWRTE = 0)
DS41250F-page 268
© 2007 Microchip Technology Inc.