PIC16F917-E/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F917-E/ML
Microchip Technology
PIC16F917-E/ML Datasheet PDF : 330 Pages
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PIC16F913/914/916/917/946
TABLE 2-1: PIC16F91X/946 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addr Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Page
Bank 0
00h INDF
Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 41,226
01h TMR0
Timer0 Module Register
xxxx xxxx 99,226
02h PCL
Program Counter’s (PC) Least Significant Byte
0000 0000 40,226
03h STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx 32,226
04h FSR
Indirect Data Memory Address Pointer
xxxx xxxx 41,226
05h PORTA
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0 xxxx xxxx 44,226
06h PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0 xxxx xxxx 54,226
07h PORTC
RC7
08h PORTD(2)
RD7
09h PORTE
RE7(3)
RC6
RD6
RE6(3)
RC5
RD5
RE5(3)
RC4
RD4
RE4(3)
RC3
RD3
RE3
RC2
RD2
RE2(2)
RC1
RD1
RE1(2)
RC0
RD0
RE0(2)
xxxx xxxx
xxxx xxxx
xxxx xxxx
62,226
71,226
76,226
0Ah PCLATH
—
—
—
Write Buffer for upper 5 bits of Program Counter
---0 0000 40,226
0Bh INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 34,226
0Ch PIR1
0Dh PIR2
EEIF
OSFIF
ADIF
C2IF
RCIF
C1IF
TXIF
LCDIF
SSPIF
—
CCP1IF
LVDIF
TMR2IF TMR1IF 0000 0000
—
CCP2IF(2) 0000 -0-0
37,226
38,226
0Eh TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1
xxxx xxxx 102,226
0Fh TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1
xxxx xxxx 102,226
10h T1CON
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 105,226
11h TMR2
Timer2 Module Register
0000 0000 107,226
12h T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 108,226
13h SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx 196,226
14h SSPCON WCOL SSPOV SSPEN
CKP
SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 195,226
15h CCPR1L Capture/Compare/PWM Register 1 (LSB)
xxxx xxxx 213,226
16h CCPR1H Capture/Compare/PWM Register 1 (MSB)
xxxx xxxx 213,226
17h CCP1CON —
—
CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 212,226
18h RCSTA
SPEN
RX9
SREN
CREN
ADDEN FERR
OERR
RX9D 0000 000x 131,226
19h TXREG USART Transmit Data Register
0000 0000 130,226
1Ah
1Bh(2)
1Ch(2)
1Dh(2)
RCREG USART Receive Data Register
CCPR2L Capture/Compare/PWM Register 2 (LSB)
CCPR2H Capture/Compare/PWM Register 2 (MSB)
CCP2CON —
—
CCP2X CCP2Y
CCP2M3
CCP2M2
CCP2M1
CCP2M0
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
128,227
213,227
213,227
212,227
1Eh ADRESH A/D Result Register High Byte
xxxx xxxx 182,227
1Fh ADCON0 ADFM VCFG1 VCFG0
CHS2
CHS1
CHS0 GO/DONE ADON 0000 0000 180,227
Legend:
Note 1:
2:
3:
- = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
PIC16F914/917 and PIC16F946 only, forced ‘0’ on PIC16F913/916.
PIC16F946 only, forced to ‘0’ on PIC16F91X.
DS41250F-page 28
© 2007 Microchip Technology Inc.
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