PIC16F917-E/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F917-E/ML
Microchip Technology
PIC16F917-E/ML Datasheet PDF : 330 Pages
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PIC16F913/914/916/917/946
3.7 PORTE and TRISE Registers
PORTE is a 1-bit, 4-bit or 8-bit port with Schmitt Trigger
input buffers. RE<7:4, 2:0> are individually configured as
inputs or outputs and RE3 is only available as an input if
MCLRE is ‘0’ in Configuration Word (Register 16-1).
RE<2:0> are only available on the PIC16F914/917 and
PIC16F946. RE<7:4> are only available on the
PIC16F946.
REGISTER 3-12: PORTE: PORTE REGISTER
R/W-x
RE7(1,3)
bit 7
R/W-x
RE6(1,3)
R/W-x
RE5(1,3)
R/W-x
RE4(1,3)
EXAMPLE 3-5:
BANKSEL PORTE
CLRF PORTE
BANKSEL TRISE
MOVLW 0Fh
MOVWF TRISE
CLRF ANSEL
INITIALIZING PORTE
;
;Init PORTE
;
;Set RE<3:0> as inputs
;
;Make RE<2:0> as I/O’s
R-x
RE3
R/W-x
RE2(2,4)
R/W-x
RE1(2,4)
R/W-x
RE0(2,4)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
RE<7:0>: PORTE I/O Pin bits
1 = Port pin is >VIH min.
0 = Port pin is <VIL max.
Note 1:
2:
3:
4:
PIC16F946 only.
PIC16F914/917 and PIC16F946 only.
PIC16F91X, Read as ‘0’.
PIC16F913/916, Read as ‘0’.
REGISTER 3-13: TRISE: PORTE TRI-STATE REGISTER
R/W-1
TRISE7(1,3)
bit 7
R/W-1
R/W-1
R/W-1
TRISE6(1,3) TRISE5(1,3) TRISE4(1,3)
R-1
TRISE3
R/W-1
TRISE2(2,4)
R/W-1
TRISE1(2,4)
R/W-1
TRISE0(2,4)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
TRISE<7:0>: PORTE Tri-State Control bits
1 = PORTE pin configured as an input (tri-stated)
0 = PORTE pin configured as an output
Note 1:
2:
3:
4:
PIC16F946 only.
PIC16F914/917 and PIC16F946 only.
PIC16F91X, Read as ‘0’.
PIC16F913/916, Read as ‘0’.
DS41250F-page 76
© 2007 Microchip Technology Inc.
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