PIC16F913/914/916/917/946
FIGURE 3-29:
BLOCK DIAGRAM OF RF<7:0>
Data Bus
WR PORTF
WR TRISF
DQ
CK Q
Data Latch
DQ
CK Q
TRIS Latch
VDD
I/O Pin
VSS
RD TRISF SE<35:28> and LCDEN
Schmitt
Trigger
RD PORTF
SEG<35:28>
SE<35:28> and LCDEN
TABLE 3-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF(1)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
LCDCON LCDEN SLPEN WERR VLCDEN CS1
CS0 LMUX1 LMUX0 0001 0011 0001 0011
LCDSE3(1) SE31 SE30 SE29
SE28
SE27 SE26
SE25
SE24 0000 0000 uuuu uuuu
LCDSE4(1)
PORTF(1)
TRISF(1)
SE39
RF7
TRISF7
SE38
RF6
TRISF6
SE37
RF5
TRISF5
SE36
RF4
TRISF4
SE35
RF3
TRISF3
SE34
RF2
TRISF2
SE33
RF1
TRISF1
SE32
RF0
TRISF0
0000 0000
xxxx xxxx
1111 1111
uuuu uuuu
uuuu uuuu
1111 1111
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTF.
Note 1: PIC16F946 only.
© 2007 Microchip Technology Inc.
DS41250F-page 83