PIC16F5X
FIGURE 11-5:
RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING -– PIC16F5X
VDD
MCLR
Internal
POR
32
DRT
Time-out
Internal
RESET
Watchdog
Timer
Reset
30
32
34
I/O pin(1)
Note 1: Please refer to Figure 11-2 for load conditions.
32
31
34
TABLE 11-3: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC16F5X
AC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
Param
No.
Sym
Characteristic
Min Typ† Max Units
Conditions
30 TMCL MCLR Pulse Width (low)
2000* — — ns VDD = 5.0V
31 TWDT Watchdog Timer Time-out Period 9.0* 18* 30* ms VDD = 5.0V (industrial)
(No Prescaler)
9.0* 18* 40*
VDD = 5.0V (extended)
32
TDRT Device Reset Timer Period
9.0* 18* 30* ms VDD = 5.0V (industrial)
9.0* 18* 40*
VDD = 5.0V (extended)
34 TIOZ I/O high-impedance from MCLR 100* 300* 2000* ns
Low
* These parameters are characterized but not tested.
† Data in the Typical (“Typ”) column is at 5.0V, 25°C unless otherwise stated. These parameters are for
design guidance only and are not tested.
DS41213C-page 68
2004 Microchip Technology Inc.