ST7LITE1xB
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
7.6.3 Low Power Modes
Mode
WAIT
HALT
Description
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
The SICSR register is frozen.
The AVD remains active.
7.6.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the corresponding Enable Control Bit (AVDIE) is
set and the interrupt mask in the CC register is re-
set (RIM instruction).
Interrupt Event
AVD event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
AVDF AVDIE Yes
Exit
from
Halt
No
34/159
1