ST7PLIT110BY0M3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PLIT110BY0M3

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI

STMicroelectronics 

ST7LITE1xB

9 POWER SAVING MODES

9.1 INTRODUCTION

To give a large measure of flexibility to the applica-

tion in terms of power consumption, five main pow-

er saving modes are implemented in the ST7 (see

Figure 22):

■ Slow

■ Wait (and Slow-Wait)

■ Active Halt

■ Auto Wake up From Halt (AWUFH)

■ Halt

After a RESET the normal operating mode is se-

lected by default (RUN mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided or multiplied by 2

(fOSC2).

From RUN mode, the different power saving

modes may be selected by setting the relevant

register bits or by calling the specific ST7 software

instruction whose action depends on the oscillator

status.

Figure 22. Power Saving Mode Transitions

High

RUN

9.2 SLOW MODE

This mode has two targets:

– To reduce power consumption by decreasing the

internal clock in the device,

– To adapt the internal clock frequency (fCPU) to

the available supply voltage.

SLOW mode is controlled by the SMS bit in the

MCCSR register which enables or disables Slow

mode.

In this mode, the oscillator frequency is divided by

32. The CPU and peripherals are clocked at this

lower frequency.

Note: SLOW-WAIT mode is activated when enter-

ing WAIT mode while the device is already in

SLOW mode.

Figure 23. SLOW Mode Clock Transition

fCPU

fOSC

fOSC/32

fOSC

SMS

SLOW

NORMAL RUN MODE

REQUEST

WAIT

SLOW WAIT

ACTIVE HALT

AUTO WAKE UP FROM HALT

HALT

Low

POWER CONSUMPTION

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