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STM32L152R6U6TTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STM32L152R6U6TTR Datasheet PDF : 133 Pages
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Revision history
9
Revision history
STM32L151x6/8/B STM32L152x6/8/B
Date
02-Jul-2010
01-Oct-2010
16-Dec-2010
25-Feb-2011
Table 73. Document revision history
Revision
Changes
1
Initial release.
Removed 5 V tolerance (FT) from PA3, PB0 and PC3 in Table 8:
STM32L15xx6/8/B pin definitions
Updated Table 14: Embedded reset and power control block
2
characteristics
Updated Table 16: Embedded internal reference voltage
Added Table 53: ADC clock frequency
Updated Table 54: ADC characteristics
Modified consumptions on page 1 and in Section 3.1: Low power
modes
3
LED_SEG8 removed on PB6.
Updated Section 6: Electrical characteristics
VFQFPN48 replaced by UFQFPN48
Section 3.3.2: Power supply supervisor: updated note.
Table 8: STM32L15xx6/8/B pin definitions: modified main function
(after reset) and alternate function for OSC_IN and OSC_OUT pins;
modified footnote 5; added footnote to OSC32_IN and OSC32_OUT
pins; C1 and D1 removed on PD0 and PD1 pins (TFBGA64
column).
Section 3.11: DAC (digital-to-analog converter): updated bullet list.
Table 10: Voltage characteristics on page 52: updated footnote 3
regarding IINJ(PIN).
Table 11: Current characteristics on page 52: updated footnote 4
regarding positive and negative injection.
Table 14: Embedded reset and power control block characteristics
on page 54: updated typ and max values for TRSTTEMPO (VDD
rising, BOR enabled).
Table 17: Current consumption in Run mode, code with data
4
processing running from Flash on page 58: removed values for HSI
clock source (16 MHz), Range 3.
Table 18: Current consumption in Run mode, code with data
processing running from RAM on page 59: removed values for HSI
clock source (16 MHz), Range 3.
Table 19: Current consumption in Sleep mode on page 60 removed
values for HSI clock source (16 MHz), Range 3 for both RAM and
Flash; changed units.
Table 20: Current consumption in Low power run mode on page 62:
updated parameter and max value of IDD Max (LP Run).
Table 21: Current consumption in Low power sleep mode on
page 63: updated symbol, parameter, and max value of IDD Max (LP
Sleep).
Table 22: Typical and maximum current consumptions in Stop mode
on page 64 updated values for IDD (Stop with RTC) - RTC clocked by
LSE external clock (32.768 kHz), regulator in LP mode, HSI and
HSE OFF (no independent watchdog).
126/133
DocID17659 Rev 12

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