PSD4255G2V-20UI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD4255G2V-20UI
STMicroelectronics
PSD4255G2V-20UI Datasheet PDF : 89 Pages
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PSD4235G2
Table 46. Drive Register Pin Assignment
Drive
Register
Bit 7
Bit 6
Bit 5
Port A
Open
Drain
Open
Drain
Open
Drain
Port B
Open
Drain
Open
Drain
Open
Drain
Port C
Slew
Rate
Slew
Rate
Slew
Rate
Port D
NA1
NA1
NA1
Port E
Open
Drain
Port F
Slew
Rate
Port G
Open
Drain
Note: 1. NA = Not Applicable.
Open
Drain
Slew
Rate
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Bit 4
Open
Drain
Open
Drain
Slew
Rate
NA1
Open
Drain
Slew
Rate
Open
Drain
Bit 3
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Bit 2
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Bit 1
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Bit 0
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Open
Drain
Slew
Rate
Open
Drain
Table 47. Port Data Registers
Register Name
Port
MCU Access
Data In
A, B, C, D, E, F, G Read – input on pin
Data Out
A, B, C, D, E, F, G Write/Read
Output Macrocell
A, B
Read – outputs of Macrocells
Write – loading Macrocells Flip-flop
Mask Macrocell
A, B
Write/Read – prevents loading into a given
Macrocell
Input Macrocell
A, B, C
Read – outputs of the Input Macrocells
Enable Out
A, B, C, F
Read – the output enable control of the port driver
Port Data Registers. The Port Data Registers,
shown in Table 47, are used by the MCU to write
data to or read data from the ports. Table 47
shows the register name, the ports having each
register type, and MCU access for each register
type. The registers are described next.
Data In. Port pins are connected directly to the
Data In buffer. In MCU I/O Input mode, the pin in-
put is read through the Data In buffer.
Data Out Register. Stores output data written by
the MCU in the MCU I/O Output mode. The con-
tents of the Register are driven out to the pins if the
Direction Register or the output enable product
term is set to 1. The contents of the register can
also be read back by the MCU.
Output Macrocells (OMC). The CPLD Output
Macrocells (OMC) occupy a location in the MCU’s
address space. The MCU can read the output of
the Output Macrocells (OMC). If the Mask Macro-
cell Register bits are not set, writing to the Macro-
cell loads data to the Macrocell flip-flops. See the
section entitled “Macrocell and I/O Port”, on page
34.
Mask Macrocell Register. Each Mask Macrocell
Register bit corresponds to an Output Macrocell
(OMC) flip-flop. When the Mask Macrocell Regis-
ter bit is set to a 1, loading data into the Output
Macrocell (OMC) flip-flop is blocked. The default
value is 0, or unblocked.
Input Macrocells (IMC). The Input Macrocells
(IMC) can be used to latch or store external inputs.
The outputs of the Input Macrocells (IMC) are rout-
ed to the PLD input bus, and can be read by the
MCU. See the section entitled “Input Macrocells
(IMC)”, on page 37.
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