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STM32F301R8U7TR(2014) View Datasheet(PDF) - STMicroelectronics

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Description
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STM32F301R8U7TR Datasheet PDF : 132 Pages
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STM32F301x6 STM32F301x8
Electrical characteristics
Symbol
Table 68. DAC characteristics (continued)
Parameter
Conditions
Min Typ
Max
Unit
tWAKEUP(3)
PSRR+ (1)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
CLOAD ï‚£ 50 pF,
RLOAD  5 kï—
Power supply rejection ratio
(to VDDA) (static DC
measurement
CLOAD  50 pF,
No RLOAD  5 kï—
-
6.5
10
μs
-
–67
–40
dB
1. Guaranteed by design, not tested in production.
2. Quiescent mode refers to the state of the DAC a keeping steady value on the output, so no dynamic consumption is
involved.
3. Data based on characterization results, not tested in production.
Figure 33. 12-bit buffered /non-buffered DAC
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DL
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
6.3.20 Comparator characteristics
Table 69. Comparator characteristics(1)
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
VDDA
VIN
VBG
VSC
tS_SC
tSTART
Analog supply voltage
-
Comparator input voltage
range
-
Scaler input voltage
-
Scaler offset voltage
-
Scaler startup time from
power down
-
Comparator startup time
VDDA  2.7 V
VDDA  2.7 V
2
-
3.6
0
-
VDDA
V
-
VREFINIT
-
-
±5
±10 mV
-
-
0.1 ms
-
-
4
μs
-
-
10
DocID025146 Rev 3
107/132
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