STM32F301x6 STM32F301x8
Electrical characteristics
Table 63. I2S characteristics(1) (continued)
Symbol Parameter
tv(WS)
WS valid time
th(WS)
WS hold time
tsu(WS)
WS setup time
th(WS)
WS hold time
tsu(SD_MR) Data input setup time
tsu(SD_SR)
th(SD_MR)
th(SD_SR)
Data input hold time
tv(SD_ST)
tv(SD_MT)
Data output valid time
Conditions
Min
Master mode
-
Master mode
2
Slave mode
0
Slave mode
4
Master receiver
1
Slave receiver
1
Master receiver
8
Slave receiver
2.5
Slave transmitter (after enable edge)
-
Master transmitter (after enable
edge)
-
th(SD_ST)
th(SD_MT)
Data output hold time
Slave transmitter (after enable edge)
8
Master transmitter (after enable
edge)
1
1. Guaranteed by characterization results.
2. 256xFs maximum is 36 MHz (APB1 Maximum frequency)
Max
20
-
-
-
-
-
-
-
50
22
-
-
Unit
ns
Note:
Refer to RM0366 Reference Manual I2S Section for more details about the sampling
frequency (Fs), fMCK, fCK, DCK values reflect only the digital peripheral behavior, source
clock precision might slightly change the values DCK depends mainly on ODD bit value.
Digital contribution leads to a min of (I2SDIV/(2*I2SDIV+ODD) and a max
(I2SDIV+ODD)/(2*I2SDIV+ODD) and Fs max supported for each mode/condition.
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