TDA75610SLV
10 Software specifications
Software specifications
All the functions of the TDA75610SLV are activated by I2C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to
TDA75610SLV) or read instruction (from TDA75610SLV to µP).
Chip address
D7
1
1
0
1
1
(*)
(*)
X = 0 Write to device
X = 1 Read from device
If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
(*) address selector bit, please refer to address selection description on Chapter 9.2.
Table 7. IB1
Bit
Instruction decoding bit
D7
Supply transition mute threshold high (D7 = 1)
Supply transition mute threshold low (D7 = 0)
D6
Diagnostic enable (D6 = 1)
Diagnostic defeat (D6 = 0)
D5
Offset Detection enable (D5 = 1)
Offset Detection defeat (D5 = 0)
Front Channel (CH1, CH3)
D4 Gain = 26 dB (D4 = 0)
Gain = 16 dB (D4 = 1)
Rear Channel (CH2, CH4)
D3 Gain = 26 dB (D3 = 0)
Gain = 16 dB (D3 = 1)
D2
Mute front channels (D2 = 0)
Unmute front channels (D2 = 1)
D1
Mute rear channels (D1 = 0)
Unmute rear channels (D1 = 1)
D0
CD 2% (D0 = 0)
CD 10% (D0 = 1)
D0
X
D8 Hex
DocID025599 Rev 6
31/42
41