PIC18F46K80T-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F46K80T-I/SP

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

REGISTER 11-5: PSPCON: PARALLEL SLAVE PORT CONTROL REGISTER

R-0

R-0

R/W-0

R/W-0

U-0

U-0

U-0

IBF

OBF

IBOV

PSPMODE

—

—

—

bit 7

U-0

—

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

bit 6

bit 5

bit 4

bit 3-0

IBF: Input Buffer Full Status bit

1 = A word has been received and is waiting to be read by the CPU

0 = No word has been received

OBF: Output Buffer Full Status bit

1 = The output buffer still holds a previously written word

0 = The output buffer has been read

IBOV: Input Buffer Overflow Detect bit

1 = A write occurred when a previously input word had not been read (must be cleared in software)

0 = No overflow occurred

PSPMODE: Parallel Slave Port Mode Select bit

1 = Parallel Slave Port mode

0 = General Purpose I/O mode

Unimplemented: Read as ‘0’

FIGURE 11-4:

PARALLEL SLAVE PORT WRITE WAVEFORMS

Q1

Q2

Q3

Q4

Q1

Q2

Q3

Q4

Q1

Q2

Q3

Q4

CS

WR

RD

PORTD<7:0>

IBF

OBF

PSPIF

 2010-2012 Microchip Technology Inc.

DS39977F-page 193

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