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PIC18F46K80T-I/SP View Datasheet(PDF) - Microchip Technology

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PIC18F46K80T-I/SP Datasheet PDF : 623 Pages
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PIC18F66K80 FAMILY
18.1 CTMU Registers
The control registers for the CTMU are:
• CTMUCONH
• CTMUCONL
• CTMUICON
The CTMUCONH and CTMUCONL registers
(Register 18-1 and Register 18-2) contain control bits
for configuring the CTMU module edge source selec-
tion, edge source polarity selection, edge sequencing,
A/D trigger, analog circuit capacitor discharge and
enables. The CTMUICON register (Register 18-3) has
bits for selecting the current source range and current
source trim.
REGISTER 18-1: CTMUCONH: CTMU CONTROL HIGH REGISTER
R/W-0
CTMUEN
bit 7
U-0
R/W-0
R/W-0
CTMUSIDL
TGEN
R/W-0
EDGEN
R/W-0
EDGSEQEN
R/W-0
IDISSEN
R/W-0
CTTRIG
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CTMUEN: CTMU Enable bit
1 = Module is enabled
0 = Module is disabled
bit 6
Unimplemented: Read as ‘0
bit 5
CTMUSIDL: Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
bit 4
TGEN: Time Generation Enable bit
1 = Enables edge delay generation
0 = Disables edge delay generation
bit 3
EDGEN: Edge Enable bit
1 = Edges are not blocked
0 = Edges are blocked
bit 2
ESGSEQEN: Edge Sequence Enable bit
1 = Edge 1 event must occur before Edge 2 event can occur
0 = No edge sequence is needed
bit 1
IDISSEN: Analog Current Source Control bit
1 = Analog current source output is grounded
0 = Analog current source output is not grounded
bit 0
CTTRIG: CTMU Special Event Trigger bit
1 = CTMU Special Event Trigger is enabled
0 = CTMU Special Event Trigger is disabled
DS39977F-page 236
2010-2012 Microchip Technology Inc.

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